1. Field of the Invention
The present invention relates to a search apparatus, a control method for the search apparatus, and a program.
2. Description of the Related Art
In recent years, there has been demand for the ability to execute network protocol processing at high speed in not only general-purpose PCs, but also embedded equipment. Achieving a sufficient speed for gigabit Ethernet in protocol processing by software requires far more performance than that of processors mounted in embedded equipment.
In view of this, it has become common to realize broadband network communication by adding an auxiliary device known as a TOE (TCP/IP Offload Engine) that is specified for protocol processing. In TCP/IP protocol processing, socket searching and listen state searching are performed in TCP processing. Also, SPD (Security Policy Database) searching and SAD (Security Association Database) searching are performed in IPsec processing. Furthermore, reassemble searching and the like are also performed in IP processing, and it is necessary to perform searching for various purposes. Among such searching, in order to increase the speed of transmission processing and reception processing in the case of TCP/IP, there is a technique in which the speed of search processing in protocol processing is increased with use of CAM (Content Addressable Memory). However, since associative memory that employs CAM is expensive, associative memory that uses RAM and adopts a method of sequential comparison result outputting is used instead. In search processing that employs a search apparatus, a corresponding address is acquired from the search apparatus with use of a search key, and data is read out and written using the acquired address.
Furthermore, in order to increase the speed of transmission processing and reception processing in the case of TCP/IP, there is a technique in which protocol processing is pipelined or parallelized using a plurality of processors. Here, consider the case in which a search apparatus is shared among these processors. In the case in which two or more processors performing search processing access the search apparatus at the same time, if one of the processors performs data rewriting while another processor is performing search processing, the data rewriting will interfere with the search. For this reason, exclusion control needs to be performed, and there is the problem that one processor monopolizes the search apparatus for a long time.
To address this problem, a technique is adopted in which instead of directly accessing data, the processors input a command to a search processing accept unit, and when processing is completed, the result is returned using a search result display. Also, Japanese Patent Laid-open No. 10-171771 proposes a technique in which a queue format is adopted to enable the sharing of a search apparatus among a plurality of processors.
In order to respond to increases in network scale, it is necessary to increase the maximum number of entries for sockets, SPs (Security Policy), SAs (Security Association), and the like that can be registered. However, the capacity of the associative memory needs to be increased in proportion to the increase in the maximum number of entries that can be registered, thus raising the implementation cost. In view of this, search processing is performed in which part of a search table is stored in an external memory such as a DRAM, and a search table stored in an on-chip internal memory such as an SRAM and a search table stored in the external memory logically configure one search table. In this way, a technique is conceivable in which the number of entries to be search target data pieces that can be registered is increased while suppressing a rise in the memory implementation cost.
The method disclosed in Japanese Patent Laid-open No. 10-171771 has no effect with respect to a reduction in the performance of search processing executed one job at a time, since each search job is processed after the previous search job has been completed. Specifically, in a search apparatus, if a search table is configured using both a high-speed internal memory and a low-speed external memory, searching the external memory will take a longer time, thus leading to the issue of a reduction in the performance of search processing executed one job at a time. Also, in the case in which the search apparatus is shared among a plurality of processors, a search job whose processing requires a longer time will delay the processing of other search jobs, and the search apparatus will be monopolized for a longer time, thus leading to the issue of the inability to efficiently process search requests. Furthermore, searches performed in protocol processing include searching in which it is only necessary to find one entry among the search targets. In the case in which a search table is configured using both a high-speed internal memory and a low-speed external memory, processing will take a longer time if an entry registered in the external memory is found. With consecutive packet searching in protocol processing, the case where the same entry is repeatedly a search hit occurs statistically often, and the issue of inefficiency arises if that entry is an entry registered in the external memory.